In order to minimize the space required by display devices, research into the development of various flat panel display devices such as LCD display devices, plasma display panels (PDP) and electro-luminescence displays (EL), has been undertaken to displace larger cathode-ray tube displays (CRT) as the most commonly used display devices. Particularly, in the case of LCD display devices, liquid crystal technology has been explored because the optical characteristics of liquid crystal material can be controlled in response to changes in electric fields applied thereto. As will be understood by those skilled in the art, a thin film transistor liquid crystal display (TFT LCD) typically uses a thin film transistor as a switching device and the electrical-optical effect of liquid crystal molecules to display data visually.
At present, the dominant methods for fabricating liquid crystal display devices and panels are typically methods based on amorphous silicon (a-Si) thin film transistor technologies. Using these technologies, high quality image displays of substantial size can be fabricated using low temperature processes. As will be understood by those skilled in the art, conventional LCD devices typically include a transparent (e.g., glass) substrate with an array of thin film transistors thereon, pixel electrodes, orthogonal gate and data lines, a color filter substrate and liquid crystal material between the transparent substrate and color filter substrate. The use of a-Si TFT technology typically also requires the use of separate peripheral integrated circuitry to drive the gates and sources (i.e., data inputs) of the TFTs in the array. In particular, gate driving signals from a gate driving integrated circuit are typically transmitted to the gate electrodes of TFTs in respective rows and data driving signals from a data driving integrated circuit are typically transmitted to the source electrodes of TFTs in respective columns. A display is typically composed of a TFT substrate in which a plurality of liquid crystal pixels are formed. Each pixel typically has at least one TFT and a pixel electrode coupled to the drain of the respective TFT. Accordingly, the application of a gate driving signal to the gate of a TFT will electrically connect the pixel electrode of a respective TFT to the data line connected thereto.
Referring now to FIGS. 1-3, an active matrix substrate of a conventional TFT LCD with a light blocking film will be described. This and other TFT LCDs are more fully described in U.S. Pat. No. 5,426,523 to Shimada et al. In particular, FIG. 1 is a plan view showing a conventional active matrix display device. FIG. 2 is a cross-sectional view of the active matrix display device of FIG. 1, taken along line A-A′ and FIG. 3 is a cross-sectional view of the active matrix display device of FIG. 1, taken along line B-B′. As illustrated by FIG. 1, a gate line 130 is formed in a horizontal direction, and a data line 150 crosses the gate line 130. A light blocking film 8, with a width larger than that of the data line 150, is formed on each data line 150. Each of the side excess portions over the data line 150 in the transverse direction is set to a length “d”. In each region defined by the gate and data lines, a pixel electrode 7 is formed so that both sides of the pixel electrode 7 overlap the neighboring blocking films and data lines by a constant length. In each pixel region, a TFT is formed. Specifically, the region of a silicon film 110 under the branch of the gate line 130 forms a gate of the TFT, the region of the silicon film 110 connected to the data line 150 by way of a contact hole 4a forms a source of the TFT, and the region of the silicon film 110 connected to the pixel electrode 7 by way of a contact hole 4b forms a drain of the TFT. If a turn-on voltage is applied to the gate line 130, a conduction path between source and drain becomes active due to the ON state of the TFT, and, therefore a video signal from the data line 150 can be transmitted to the pixel electrode 7 via the silicon film 110.
Referring now to FIG. 2, a silicon film 110 is formed on a transparent substrate 100, and serves as a source electrode, a drain electrode and a semiconductor active layer of the TFT. A gate insulating film 120 is formed on the silicon film 110 and the transparent substrate 100 so as to cover the entire surface. On a certain region of the gate insulating film 120, a gate electrode 130 is formed. Moreover, an insulating film 140 is formed on the entire surface of the gate electrode 130 and the gate insulating film 120. A contact hole 4a is formed through the gate insulating film 120 and the insulating film 140. On the insulating film 140, the data line 150 is formed and connected to the silicon film 110 via the contact hole 4a. 
On the entire surface of the insulating film 140 and the data line 150, a passivation film 160 is formed, and a contact hole 4b is formed through the gate insulating film 120, the insulating film 140 and the passivation film 160. A pixel electrode 7, made of an indium-tin-oxide (ITO) film, is formed on the passivation film 160 and connected to the silicon film 110 via the contact hole 4b. A video signal received from the data line 150 passes through the silicon film 110 via the contact hole 4a, and, then, is transmitted to the ITO pixel electrode 7 via the contact hole 4b. The TFT with such a structure where the gate electrode 130 is located on the semiconductor layer is called a top gate type TFT.
A cross-sectional structure of the prior active matrix substrate coupled with a liquid crystal layer and a counter substrate will now be described with reference to FIG. 3. Here, a gate insulating film 120 is formed on a transparent substrate 100, and a data line 150 is formed thereon. A passivation film 160 is formed on the entire film of the gate insulating film 120 and the data line 150, and a light blocking film 8 is formed on the passivation film so as to cover a certain region of the passivation film over the data line 150. An insulating film 180 is formed on the entire surface of the light blocking film 8 and the passivation film 160, and an ITO pixel electrode 7 is formed thereon. In the above mentioned structure of the prior active matrix substrate, the data line 150 has a thickness of 500 nm, and is usually formed of aluminum (Al). The passivation film 160 is formed of silicon oxide (SiOx) having a thickness of 400 nm. Furthermore, the light blocking film 8 having a thickness of 100 nm is formed of the same material as the data line 150, and each of the lengths “d” of the side excess portions of the light blocking film 8 over the data line 150 in the transverse direction, is set to be 5 μm.
A counter substrate 200, including a transparent counter electrode 210 formed on the surface thereof, is attached to the active matrix substrate. Into a space between the two substrates, liquid crystal is injected to form the liquid crystal layer 190, and the thickness of the liquid crystal layer 190 is set to be about 5 μm. Here, even though abnormal light leakage occurs due to the orientation disorder of the liquid crystal molecules in the edge regions of the data line 150 (caused by a step of the data line 150), the light leakage can be blocked considerably since the light blocking film 8 is broader than the data line 150 and is formed to cover the data line 150. In these circumstances, the orientation disorder of the liquid crystal molecules by a step of the light blocking film 8 can be negligible, since the thickness of the light blocking film 8 is very small than that of the data line 150.
However, some light leakage still remains due to the considerable step of the data line 150. Especially, in a normally white mode display, the vicinity of the step of the data line 150 is not absolutely black even when a voltage is applied to the liquid crystal for a black display. Thus, the contrast of the display apparatus is degraded. In addition, the opening ratio of the liquid crystal display apparatus is made smaller since the light blocking film 8 is formed to exceed 5 μm at its side portions over the data line 150 and thus covers the pixel electrode 7 with its excess regions.
In the illustrated display device, the light blocking film 8 is located between the pixel electrode 7 and the data line 150 while overlapping one another. Accordingly, the capacitive coupling between the pixel electrode 7 and the data line 150 increases because the light blocking film 8 serves as an intermediate conductive layer. Moreover, the fabrication of this structure where the light blocking film 8 is formed on the data line 150 increases manufacturing cost since it requires additional processes such as metal deposition and etching.
Thus, notwithstanding the above described prior art active matrix liquid crystal display devices, there continues to be a need for improved liquid crystal display devices which have high contrast and opening ratios and are less susceptible to light leakage caused by disordered or misaligned liquid crystal molecules.